Traffic Generator

Traffic Generator

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1.
Simics users often need to model the physical world or look deep into the implementation of computer components. Rather than using Simics itself to create such models, it sometimes makes more sense to integrate Simics with other simulators, leaving each simulator to do what it does best. Chapter 9 addresses the reasons for and the main issues involved in creating such simulator integrations. The chapter provides a discussion on the general issues involved in integrating simulators and proven design patterns for such integrations.

    Chapter 10 describes how Intel® has used Simics for improving the system development workflow. At Intel®, one of the major use cases of Simics is to help software and hardware bring-up, starting from the early pre-silicon stages. With the help of Simics, a functional model of future Intel® hardware can be made available to BIOS and driver developers a year or more ahead of engineering samples. This approach allows development of low-level software, which is very hardware-dependent, in parallel with the development of the hardware. In addition, close collaboration with hardware developers allows the team of Simics engineers to perform a certain amount of validation of early hardware specifications, thus speeding up the hardware development process as well. These practices lead to cost savings by reducing product time-to-market, the “shift left.”.

    2. 

    Discrete controller and plant

    We now present a fully discrete model of the TCP/AQM system, obeying the underlying first principles described in Sections 4.2.2 and 4.2.1. In Figure 18.18 we show the model implemented in PowerDEVS, which is a hybrid model mixing discrete event and discrete time.

    The traffic generator APPSND represents the “user application” that uses the underlying TCP services. APPSND uses an exponential probability distribution for the inter–generation times between packets. All blocks are capable of accepting, processing and emitting packets, which are hierarchical data structures nesting header–payload–tail substructures, imitating the way in which real-world protocols are encapsulated one into another according to the OSI model.

    Simulation results are shown in Figure 18.19. The simulation time was 127 s (averaging several equivalent simulations). This is approximately 28 times slower than the fully continuous model presented in the previous section.

    Again, an oscillatory pattern is observed. Results are qualitatively comparable, offering a reasonable confidence about the coherence across models. In Figure 18.20 variables Wq and x are compared for models continuous and discrete during the first 30 seconds.

    Qualitatively, the excursion ranges of the variables are comparable, taking into account that the continuous system removes all dispersions around averages, which are present in the discrete system; e.g., the discrete system shows phases in which the instantaneous queue lengths drop down to zero, which is consistent with what happens in real systems.



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